CPRI Intel® FPGA IP User Guide

ID 683595
Date 5/19/2023
Public
Document Table of Contents
Give Feedback

3.15.2.3. Retrieving the Hyperframe Control Words

A control receive table contains one entry for each of the 256 control words in the current hyperframe. To read a control word, your application must write the control word number X to the rx_ctrl_x field of the CTRL_INDEX register and then read the last received #Z.X control word from the RX_CTRL register. Because the register can hold only 32 bits at a time, depending on the CPRI line bit rate, reading the full control word may require multiple register accesses. Increment the value in the rx_ctrl_seq field of the CTRL_INDEX register from zero to four to access the full control word when the CPRI line bit rate is 10.1376 Gbps, or from zero to two when the CPRI line bit rate is 6.144 Gbps, for example.

Control Word Retrieval Example when Data path width is set to 32:

To retrieve the vendor-specific portion of a control word in the most recent received hyperframe, perform the following steps:

  1. Identify the indices for the vendor-specific portion of the transmit control table, using the formula X = Ns + 64 * Xs.

    In the example, Ns = 16 and Xs = 0, 1, 2, and 3. Therefore, the indices to be read are 16, 80, 144, and 208.

  2. For each value X in 16, 80, 144, and 208, perform the following steps:
    1. Write the value X to the rx_ctrl_x field of the CTRL_INDEX register.
    2. Reset the rx_ctrl_seq field of the CTRL_INDEX register to the value of zero.
    3. In the following cpu_clk cycle, read the first 32-bit section of the control word from the RX_CTRL register.
    4. If the CPRI line bit rate is greater than 2.4576 Gbps, increment the rx_ctrl_seq field of the CTRL_INDEX register to the value of 1 and in the following cpu_clk cycle, read the second 32-bit section of the #Z.X control word from the RX_CTRL register.
    5. If the CPRI line bit rate is greater than 4.9152 Gbps, increment the rx_ctrl_seq field of the CTRL_INDEX register to the value of 2 and in the following cpu_clk cycle, read the third 32-bit section of the #Z.X control word from the RX_CTRL register.
    6. If the CPRI line bit rate is greater than 6.144 Gbps, increment the rx_ctrl_seq field of the CTRL_INDEX register to the value of 3 and in the following cpu_clk cycle, read the fourth 32-bit section of the #Z.X control word from the RX_CTRL register.
    7. If the CPRI line bit rate is 10.1376 Gbps, increment the rx_ctrl_seq field of the CTRL_INDEX register to the value of 4 and in the following cpu_clk cycle, read the fifth 32-bit section of the #Z.X control word (the real-time vendor specific bytes) from the RX_CTRL register.

Control Word Retrieval Example when Data path width is set to 64:

To retrieve the vendor-specific portion of a control word in the most recent received hyperframe, perform the following steps:

  1. Identify the indices for the vendor-specific portion of the transmit control table, using the formula X = Ns + 64 * Xs.

    In the example, Ns = 16 and Xs = 0, 1, 2, and 3. Therefore, the indices to be read are 16, 80, 144, and 208.

  2. For each value X in 16, 80, 144, and 208, perform the following steps:
    1. Write the value X to the rx_ctrl_x field of the CTRL_INDEX register.
    2. Reset the rx_ctrl_seq and rx_ctrl_wpos fields of the CTRL_INDEX register to the value of zero. In the following cpu_clk cycle, read the first 32-bit section of the control word from the RX_CTRL register.
    3. If the CPRI line bit rate is greater than 2.4576 Gbps, increment the rx_ctrl_wpos field of the CTRL_INDEX register to the value of 1 and in the following cpu_clk cycle, read the second 32-bit section of the #Z.X control word from the RX_CTRL register.
    4. If the CPRI line bit rate is greater than 4.9152 Gbps, increment the rx_ctrl_seq and clear the rx_ctrl_wpos field of the CTRL_INDEX register to the value of 1 and 0 respectively. In the following cpu_clk cycle, read the third 32-bit section of the #Z.X control word from the RX_CTRL register.
    5. If the CPRI line bit rate is greater than 6.144 Gbps, increment the rx_ctrl_wpos field of the CTRL_INDEX register to the value of 1 and in the following cpu_clk cycle, read the fourth 32-bit section of the #Z.X control word from the RX_CTRL register.
    6. If the CPRI line bit rate is greater than 9.8304 Gbps, increment the rx_ctrl_seq and clear rx_ctrl_wpos fields of the CTRL_INDEX register to the value of 2 and 0 respectively. In the following cpu_clk cycle, read the fifth 32-bit section of the #Z.X control word from the RX_CTRL register.
    7. If the CPRI line bit rate is 10.1376 Gbps, increment the rx_ctrl_seq field of the CTRL_INDEX register to the value of 1 and in the following cpu_clk cycle, read the sixth 32-bit section of the #Z.X control word (the real-time vendor specific bytes) from the RX_CTRL register.
    8. If the CPRI line bit rate is 24.33024 Gbps, increment the rx_ctrl_seq/rx_ctrl_wpos or clear rx_ctrl_wpos in a similar pattern to access subsequent 32-bit sections from the RX_CTRL register