CPRI Intel® FPGA IP User Guide

ID 683595
Date 5/19/2023

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

3.14.3. Ethernet PCS Run-Time Switching

A feature to allow the user to switch Ethernet PCS has been added. The user can now switch to external Ethernet PCS or internal Ethernet PCS as they wish, during run time. To use this feature, please set the value of the "Ethernet PCS interface" parameter to "GMII", then select "Bypass Ethernet PCS" and select "Enable run time switch of GMII PCS" in the CPRI IP parameter editor.

Selecting this feature allows both the GMII normal mode and GMII PCS bypass mode logics to be generated and present. Users are presented with a port named "gmii_pcs_switch" which can be used to control which Ethernet PCS to be used. Refer to Table 36 on the usage of this port.

When performing the switching, the IP must be put in reset. As a result, the CPRI hyperframe synchronization is lost during the switch. Use caution to make sure no data is lost during this switching process.

The following resets need to remain asserted while performing the switch:
  1. reset_n
  2. reset_tx_n
  3. reset_rx_n
  4. ex_delay_reset_n
  5. gmii_txreset_n
  6. gmii_rxreset_n
Table 36.  GMII PCS Switching Signal
Signal Name Direction Description
gmii_pcs_switch Input Driving this port to LOW (1'b0) switches the IP to use the external Ethernet PCS. Meanwhile driving this port to HIGH (1'b1) switches the IP to use the internal Ethernet PCS.