Agilex™ 7 Hard Processor System Component Reference Manual

ID 683581
Date 10/08/2025
Public
Document Table of Contents

4.4.1. Questa*-Altera® FPGA Edition Simulation Steps

  1. Use the following command to change directory to the Mentor Graphics* testbench simulation directory: cd <project directory>/simple_tb/simple_tb/sim/mentor/.
  2. Create a new file and name it my_msim_setup.do. Edit the file with the following content:
    set TOP_LEVEL_NAME simple_tb
    
    ### set QSYS_SIMDIR <script generation output directory>
    set QSYS_SIMDIR ./..
    
    ### source msim_setup.tcl
    source $QSYS_SIMDIR/mentor/msim_setup.tcl
    
    ensure_lib libraries
    ensure_lib libraries/work
    vmap work  libraries/work
    
    ### Compile
    dev_com
    com
    
    vlib work
    
    vlog -sv -timescale 1ns/1ns -L altera_lnsim_ver ../my_simple_tb.sv
    vlog -sv -timescale 1ns/1ns -L altera_lnsim_ver ../test_lwh2f.sv
    vlog -sv -timescale 1ns/1ns -L altera_lnsim_ver ../test_h2f.sv
            
    ### Simulate
    elab_debug
    
    add wave -group LWH2F	/simple_tb/simple_inst/intel_agilex_hps_0/intel_agilex_hps_0/fpga_interfaces/hps_inst/s2f_module/lwh2f_bfm_gen/lwh2f_axi4_manager_inst/* 
    add wave -group H2F	/simple_tb/simple_inst/intel_agilex_hps_0/intel_agilex_hps_0/fpga_interfaces/hps_inst/s2f_module/h2f_bfm_gen/h2f_axi4_manager_inst/*
    
    ### Run the simulation.
    run -all
    
  3. Set up your developer environment with the proper resources. The Questa*-Altera® FPGA Starter Edition is free, however it requires a zero-cost license. For comprehensive information for downloading, installing, and licensing Altera FPGA software, refer to the Altera® FPGA Software Installation and Licensing
  4. Run the simulation script by being in the Mentor Graphics* testbench simulation directory and executing the simulation command:
    1. cd <project directory>/simple_tb/simple_tb/sim/mentor/
    2. vsim -do my_msim_setup.do
    The following figure shows the simulation output from this example.
    Figure 43. Example of Simulation Output