Agilex™ 7 Hard Processor System Component Reference Manual
ID
683581
Date
10/08/2025
Public
3.1. Simulation Flows
3.2. Clock and Reset Interfaces
3.3. FPGA-to-HPS AXI* Slave Interface
3.4. HPS-to-FPGA AXI* Master Interface
3.5. Lightweight HPS-to-FPGA AXI* Master Interface
3.6. HPS-to-FPGA MPU Event Interface
3.7. Interrupts Interface
3.8. HPS-to-FPGA Debug APB Interface
3.9. FPGA-to-HPS System Trace Macrocell Hardware Event Interface
3.10. HPS-to-FPGA Cross-Trigger Interface
3.11. HPS-to-FPGA Trace Port Interface
3.12. FPGA-to-HPS DMA Handshake Interface
3.13. General Purpose Input Interface
3.14. EMIF Conduit
3.15. Simulating the Agilex™ 7 HPS Component Revision History
3.1.1. Setting Up the HPS Component for Simulation
The following steps outline how to set up the HPS component for simulation.
- Add the HPS component from the Platform Designer Component Library.
- Configure the component based on your application needs by selecting or deselecting the HPS/FPGA interfaces.
- Connect the appropriate HPS interfaces to other components in the system. For example, connect the FPGA‑to‑SDRAM AXI* 4 subordinate interface to a compatible AXI* or Avalon® memory-mapped master interface in another component in the system.
Note: You can test, compile, and elaboration file (elab) without connecting anything to the HPS.
- Click Generate HDL and select desired simulation options in the simulation section before clicking Generate in the pop-up window.