Agilex™ 7 Hard Processor System Component Reference Manual

ID 683581
Date 10/08/2025
Public
Document Table of Contents

4.1. Setting up the HPS Component for Simulation

Follow these steps to set up the HPS component for simulation.
  1. Add the HPS component from the Platform Designer Component Library.
  2. Configure the HPS component based on your application needs by selecting or deselecting the HPS/FPGA interfaces.
  3. Connect the appropriate HPS interfaces to other components in the system. For example, connect:
    1. the h2f_axi_master AXI* 4 manager interface to an On-Chip Memory II (RAM or ROM) IP component
    2. the h2f_lw_axi_master AXI* 4 manager interface to an On-Chip Memory II (RAM or ROM) component
  4. For this example, name the project simple. The Platform Designer connections are shown below.
    Figure 38. Platform Designer Connections
  5. This example uses the LWH2F bridge with 32-bit width and the H2F bridge with 128-bit width. The F2H bridge is not used. The parameters are shown below.
    Figure 39. HPS FPGA Bridges Parameters
  6. This example uses two On-Chip Memory II (RAM or ROM) IP components, one for the h2f_lw_axi_master interface and one for the h2f_axi_master interface.
    1. The one connected to the h2f_lw_axi_master has an Interface type of AXI* -4, a data width of 32-bits, and Transaction ID width of 4.
    2. The one connected to the h2f_axi_master has an Interface type of AXI* -4, a data width of 128-bits, and Transaction ID width of 4. Refer to the parameter GUI below.
      Figure 40.  On-Chip Memory II (RAM or ROM) IP Parameter GUI