Intel® Stratix® 10 Embedded Memory User Guide

ID 683423
Date 10/01/2021
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

2.9. 'X' Propagation Support in Simulation

The embedded memory simulation model in the Intel® Quartus® Prime Pro Edition software supports "X" propagation in simulation for Intel® Stratix® 10 devices. When you drive any input signals with a non-deterministic value ("X"), the memory content and/or output could result to an "X" value. For example, if the write address is "X", the whole memory content is written with "X" (i.e., "X" acts as memory corruption) because the address to which the data content is written is unknown. This feature is applicable to the RAM and ROM operating modes.

Note: The embedded memory simulation model does not support any "X" propagation option from third-party simulators, such as Modelsim, VCS, and others.
The following embedded memory IPs support the "X" propagation in simulation, starting from Intel® Quartus® Prime Pro Edition software version 20.3:
  • RAM: 1-Port Intel® FPGA IP
  • RAM: 2-Port Intel® FPGA IP
  • RAM: 4-Port Intel® FPGA IP
  • ROM: 1-Port Intel® FPGA IP
  • ROM: 2-Port Intel® FPGA IP
  • Shift Register (RAM-based) Intel® FPGA IP

To enable this feature, you must include the ENA_INPUT_X_PROP define flag in the simulation command when compiling the embedded memory simulation model and when running the simulation.

The following is an example of adding the define flag into the simulation command:
vlog -sv -timescale 1ps/1ps +define+ENA_INPUT_X_PROP -work msim_precompile $env(QUARTUS_DIR)/eda/sim_lib/altera_lnsim.sv

The following figures show examples of the "X" propagation when write enable is "X".

Figure 18. Example of "X" Propagation Support for Simple Dual Port
Figure 19. Example of "X" Propagation Support for Shift Register