Intel® Stratix® 10 Embedded Memory User Guide

ID 683423
Date 10/01/2021
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4.2. eSRAM Intel® FPGA IP

The basic building block of the eSRAM Intel® FPGA IP is a bank, which consists of an array of 2K x 72 -bit SRAM blocks.

42 eSRAM banks combine to form a channel.

Figure 28. eSRAM Channel

Eight memory channels combine to form an eSRAM system.

Figure 29. eSRAM System