Intel® Cyclone® 10 GX CvP Initialization over PCI Express User Guide

ID 683358
Date 1/02/2018
Document Table of Contents

4.3. VSEC Registers for CvP

The Vendor Specific Extended Capability (VSEC) registers occupy byte offset 0x200 to 0x240 in the PCIe Configuration Space. The PCIe host uses these registers to communicate with the FPGA control block. The following table shows the VSEC register map. Subsequent tables provide the fields and descriptions of each register.

Table 8.  VSEC Registers for CvP
Byte Offset Register Name
0x200 Intel® -defined Vendor Specific Capability Header
0x204 Intel® -defined Vendor Specific Header
0x208 Intel® Marker
0x20C:0x218 Reserved
0x21C CvP Status
0x220 CvP Mode Control
0x224 CvP Data 2
0x228 CvP Data
0x22C CvP Programming Control
0x230 Reserved
0x234 Uncorrectable Internal Error Status Register
0x238 Uncorrectable Internal Error Mask Register
0x23C Correctable Internal Error Status Register
0x240 Correctable Internal Error Mask Register

Did you find the information on this page useful?

Characters remaining:

Feedback Message