Low Latency Ethernet 10G MAC Intel® Cyclone® 10 GX FPGA IP Design Example User Guide

ID 683354
Date 11/30/2020
Document Table of Contents

2. 10GBASE-R Ethernet Design Example for Intel® Cyclone® 10 GX Devices

The 10GBASE-R Ethernet design example demonstrates an Ethernet solution for Intel® Cyclone® 10 GX devices using the LL 10GbE MAC Intel® FPGA IP core, the native PHY IP core, and a FPGA Mezzanine Card (FMC) module.

Generate the design example from the Example Design tab of the LL 10GbE Intel® FPGA IP parameter editor.

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