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1. Discontinuation of the Intel® HLS Compiler
2. Intel® HLS Compiler Pro Edition Reference Manual
3. Compiler
4. C Language and Library Support
5. Component Interfaces
6. Component Memories (Memory Attributes)
7. Loops in Components
8. Component Concurrency
9. Arbitrary Precision Math Support
10. Component Target Frequency
11. Systems of Tasks
12. Libraries
13. Advanced Hardware Synthesis Controls
14. Intel® High Level Synthesis Compiler Pro Edition Reference Summary
A. Advanced Math Source Code Libraries
B. Supported Math Functions
C. Cyclone® V Restrictions
D. Intel® HLS Compiler Pro Edition Reference Manual Archives
E. Document Revision History of the Intel® HLS Compiler Pro Edition Reference Manual
15. Discontinuation of the Intel® HLS Compiler
7.1. Loop Initiation Interval (ii Pragma)
7.2. Loop-Carried Dependencies (ivdep Pragma)
7.3. Loop Coalescing (loop_coalesce Pragma)
7.4. Loop Unrolling (unroll Pragma)
7.5. Loop Concurrency (max_concurrency Pragma)
7.6. Loop Iteration Speculation (speculated_iterations Pragma)
7.7. Loop Pipelining Control (disable_loop_pipelining Pragma)
7.8. Loop Interleaving Control (max_interleaving Pragma)
7.9. Loop Fusion
12.4.1.1. Integration of an RTL Module into the HLS Pipeline
12.4.1.2. RTL Module Interfaces
12.4.1.3. RTL Reset and Clock Signals
12.4.1.4. Object Manifest File Syntax
12.4.1.5. Mapping HLS Data Types to RTL Signals
12.4.1.6. HLS Emulation Models for RTL-Based Functions
12.4.1.7. Potential Incompatibility between RTL Modules and Partial Reconfiguration
12.4.1.8. Stall-Free RTL
12.4.1.9. RTL Module Restrictions and Limitations for HLS Libraries
14.1. Intel® HLS Compiler Pro Edition i++ Command-Line Arguments
14.2. Intel® HLS Compiler Pro Edition Header Files
14.3. Intel® HLS Compiler Pro Edition Compiler-Defined Preprocessor Macros
14.4. Intel® HLS Compiler Pro Edition Keywords
14.5. Intel® HLS Compiler Pro Edition Simulation API (Testbench Only)
14.6. Intel® HLS Compiler Pro Edition Component Memory Attributes
14.7. Intel® HLS Compiler Pro Edition Loop Pragmas
14.8. Intel® HLS Compiler Pro Edition Scope Pragmas
14.9. Intel® HLS Compiler Pro Edition Component Attributes
14.10. Intel® HLS Compiler Pro Edition Component Default Interfaces
14.11. Intel® HLS Compiler Pro Edition Component Invocation Interface Control Attributes
14.12. Intel® HLS Compiler Pro Edition Component Macros
14.13. Intel® HLS Compiler Pro Edition Systems of Tasks API
14.14. Intel® HLS Compiler Pro Edition Pipes API
14.15. Intel® HLS Compiler Pro Edition Streaming Input Interfaces
14.16. Intel® HLS Compiler Pro Edition Streaming Output Interfaces
14.17. Intel® HLS Compiler Pro Edition Memory-Mapped Interfaces
14.18. Intel® HLS Compiler Pro Edition Load-Store Unit Control
14.19. Intel® HLS Compiler Pro Edition Arbitrary Precision Data Types
B.1. Math Functions Provided by the math.h Header File
B.2. Math Functions Provided by the extendedmath.h Header File
B.3. Math Functions Provided by the ac_fixed_math.h Header File
B.4. Math Functions Provided by the hls_float.h Header File
B.5. Math Functions Provided by the hls_float_math.h Header File
B.6. Default Rounding Schemes and Subnormal Number Support
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10.1. Effects of Specifying Target II and Target fMAX
Setting a target II (through hls_component_ii component attribute or #pragma ii loop pragma) and setting a target fMAX (through the hls_scheduler_target_fmax_mhz component attribute) affects how the scheduler in the Intel® HLS Compiler determines its efforts.
The following table summarizes the behavior of the scheduler in the Intel® HLS Compiler.
Set Target fMAX | Set Target II | Compiler Behavior |
---|---|---|
No | Yes | Best effort to achieve the II for the corresponding loop (may not achieve the best possible fMAX). |
Yes | No | Best effort to achieve fMAX specified (may not achieve the best possible II). |
Yes | Yes | Best effort to achieve the fMAX specified at the given II. The compiler errors out if it cannot achieve the requested II. |
No | No | Use heuristic to achieve best fMAX/II trade-off. |
Important: If you are using an fMAX target in the command line or a component attribute, specify #pragma ii for performance-critical loops in your design.