Intel® High Level Synthesis Compiler Pro Edition: Reference Manual

ID 683349
Date 4/01/2024
Document Table of Contents

12.2. The hls_fpga_reg() Function

In some cases, explicitly asking the compiler to insert a register stage between the operand and the return value of the function call can help improve the performance of your component. Use the hls_fpga_reg() function to insert at least one register between the operand and return value of the function call.

Typically, you do not need to use this function to achieve the performance from your component that you want.

To use the hls_fpga_reg() function effectively, you must know about how portions of the data path are placed on FPGA devices, and you typically use the hls_fpga_reg() function for the following purposes:
  • Breaking the critical paths between spatially distant portions of a data path, such as between processing elements of a large systolic array.
  • Reducing the pressure on placement and routing efforts caused by spatially distinct portions of the component implementation.
The Intel® HLS Compiler does not provide feedback about where you should add hls_fpga_reg() function calls. Use Quartus® Prime software to determine where you should insert the calls to address specific aspects of component performance.
You can learn more about the hls_fpga_reg() function by reviewing the tutorial available in the following location:
T hls_fpga_reg(T op)

where T can be any sized type.


The hls_fpga_reg() function directs the Intel® HLS Compiler to insert at least one hardware pipelining register on the signal path that assigns the operand to the return value. This built-in function operates as an assignment, where the operand is assigned to the return value. The assignment has no implicit semantic or functional meaning beyond a standard assignment.

Usage Notes
You can nest hls_fpga_reg() function calls to increase the minimum number of registers that are inserted on the assignment path. Because each function call guarantees the insertion of at least one register stage, the number of nested calls provides a lower limit on the number of registers.
For example, the following code snippet tells the compiler to insert at least two registers on the assignment path.
int out=hls_fpga_reg(hls_fpga_reg(in));
The compiler inserts two or more registers on the path.