100G Interlaken Intel® FPGA IP User Guide

ID 683338
Date 10/31/2022
Document Table of Contents 100G Interlaken IP Core RX PCS

RX PCS logic is an embedded hard macro and does not consume FPGA soft logic elements.

The 100G Interlaken IP core RX PCS block performs the following functions to retrieve the data:

  • Detects word lock and word synchronization.
  • Checks running disparity.
  • Reverses gearboxing and 64/67B encoding.
  • Descrambles the data.
  • Delineates meta frame boundaries.
  • Performs CRC32 checking.
  • Sends lane status information to the calendar and status blocks, if Include in-band flow control functionality is turned on.