100G Interlaken Intel® FPGA IP User Guide

ID 683338
Date 10/31/2022
Document Table of Contents

4.1.2. Interlaken Interface

The Interlaken interface complies with the Interlaken Protocol Specification, Revision 1.2. It provides a high‑speed transceiver interface to an Interlaken link.

The 100G Interlaken IP core value for the Interlaken BurstMax parameter is determined by the value you specify on the burst_max_in input signal. The 100G Interlaken IP core supports three values for BurstMax, 128 bytes, 256, and 512 bytes.

Note: You should only modify the value of the burst_max_in signal when no traffic is present.

You can configure your 100G Interlaken IP core to use 1, 2, 4, 8, or 16 pages of 16 calendar bits. The application determines the use of the in‑band flow control bits that the IP core receives on the incoming Interlaken link, and the application is responsible for specifying the values of the in‑band flow control bits the IP core transmits on the outgoing Interlaken link.