100G Interlaken Intel® FPGA IP User Guide

ID 683338
Date 10/31/2022
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4.8.1.2. 100G Interlaken IP Core Dual Segment Interleaved Data Transfer Receive Example

Figure 18. Dual Segment Data Transfer on Receive Interface in Interleaved Mode

This example illustrates the expected behavior of the 100G Interlaken IP core application interface receive signals during dual segment transfers of three data bursts in interleaved mode. The 100G Interlaken IP core can generate dual segment data transfers only if you configure the IP core in dual segment mode.

The figure shows three data bursts in dual segment mode on the RX user data transfer interface. In cycle 1, the IP core asserts irx_sop[1] and irx_sob[1], indicating that this cycle is both the start of the burst and the start of the packet, and that data starts from the most significant byte of the data symbol. The IP core drives the value of 2 on irx_chan to indicate the data targets channel 2.

In cycle 2, the following two events occur:

  • The first data burst completes. The IP core asserts irx_eob, indicating the data the IP core transfers to the application in this clock cycle is the end of the burst. The value the IP core drives on irx_num_valid[7:4] indicates that one word in this data symbol is valid data associated with this burst. In addition, the IP core drives irx_eopbits to the value of 4'b0000 to indicate that the data the IP core transfers to the application in this clock cycle is not the end of the packet.
  • A second data burst starts at Word 3, as is allowed in dual segment mode. The IP core asserts irx_sop[0] and irx_sob[0], indicating that this cycle is both the start of the burst and the start of the packet, and that data in this burst and packet starts from Byte 31 of the data symbol. The IP core drives the value of 3 on irx_chan to indicate the data targets channel 3. The value of irx_num_valid[3:0] is 4'b0100, indicating this data transfer is a dual segment data transfer—that it begins at Word 3. The value of irx_num_valid[7:4] has no relevance for the data words in this burst that appear in this data symbol, except to indicate the previous burst includes no data in these words of the data symbol (Words 3 through 0), and therefore, that they are available for the second data burst. As is required, the dual segment data transfer places valid data in all four words in the least significant half of the data symbol.

In cycles 3 and 4, the second data burst continues with no EOB or EOP indication. The application should not sample the value of irx_chan in these clock cycles. The value on irx_num_valid[7:4] indicates that all eight words in each of these data symbols are valid data associated with this burst.

In cycle 5, the following two events occur:

  • The second data burst completes. The IP core asserts irx_eob, indicating the data transfered in this clock cycle is the end of the burst. The value the IP core drives on irx_num_valid[7:4] indicates that four words in this data symbol are valid data associated with this burst. In addition, the value the IP core drives on irx_eopbits indicates the data is the end of the packet, and that all eight bytes of the final data word are valid data bytes.
  • A third data burst starts at Word 3, as is allowed in dual segment mode. The IP core asserts irx_sob[0], indicating that this cycle is the start of the burst and that data in this burst starts from Byte 31 of the data symbol. However, the IP core does not assert irx_sop[0], indicating this burst is not the first burst in the packet. The value the IP core drives on irx_chan indicates the data targets channel 2. Therefore, we can conclude this data burst is the second burst in a packet that targets channel 2. The value the IP core drives on irx_num_valid[3:0] is 4'b0100, indicating this data transfer is a dual segment data transfer—that it begins at Word 3. The value of irx_num_valid[7:4] has no relevance for the data words in this burst that appear in this data symbol, except to indicate the previous burst includes no data in these words of the data symbol (Words 3 through 0), and therefore, that they are available for the second data burst. As is required, the dual segment data transfer places valid data in all four words in the least significant half of the data symbol.

In cycle 6, the third data burst completes. The IP core asserts irx_eob, indicating the data transfered in this clock cycle is the end of the burst. The value on irx_num_valid[7:4] indicates that five words in this data symbol are valid data associated with this burst. In addition, the value the IP core drives on irx_eopbits indicates the data is the end of the packet, and that all eight bytes of the final data word are valid data bytes. Because the data from this burst occupies words 7 through 3 of the data symbol, another burst cannot start in the current data symbol.

By default, the RX user data transfer interface can generate interleaved data. However, the IP core can also transfer a packet without interleaving—if the IP core does not toggle the channel number during the packet transfer, the packet is not interleaved with another packet. In this case, the IP core still asserts the irx_sob and irx_eob signals correctly to maintain the proper burst boundaries.