100G Interlaken Intel® FPGA IP User Guide

ID 683338
Date 10/31/2022
Public
Document Table of Contents
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4.2. High Level Block Diagram

Figure 8.  100G Interlaken Block Diagram

The 100G Interlaken IP core consists of two paths: an Interlaken TX path and an Interlaken RX path. Each path includes MAC, PCS, and PMA blocks. The PCS blocks are implemented in hard IP.