Serial Lite III Streaming Stratix® V FPGA IP Design Example User Guide

ID 683335
Date 11/01/2021
Document Table of Contents Serial Lite III Streaming IP Core

The Serial Lite III Streaming IP core in this variant can either accepts data from the traffic generator and format it for transmission or receive data from the link, strips the headers, and presents it to the traffic checker for analysis. The core is generated with the parameter settings you select using the parameter editor in the Intel® Quartus® Prime software.