Video and Vision Processing Suite Intel® FPGA IP User Guide

ID 683329
Date 4/04/2022

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Document Table of Contents

1.3. Video and Vision Processing IPs Features

  • Intel FPGA streaming video data interfaces for video I/O, based on the industry standard AXI4-Stream protocol
  • Avalon memory-mapped agent interfaces for run-time control and Avalon memory-mapped host interface for external memory usage allowing push-button conversion in Intel Platform Designer to industry standard AXI4 or AXI4-Lite memory mapped interfaces if required.
  • Device utilization and Fmax on Intel Agilex FPGAs allowing 8K60 processing on Intel Agilex platforms with four pixels in parallel at 600 MHz.
  • Processing of 1 to 8 pixels in parallel
  • Support for 1 to 4 color symbols per pixel and RGB and YCbCr 444, 422 and 420 color spaces.
  • Data precision of from 8 to 16 bits per symbol.
  • Video fields with 1 to 16384 pixels in both height and width.