Video and Vision Processing Suite Intel® FPGA IP User Guide

ID 683329
Date 4/04/2022
Public

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Document Table of Contents

15.4. Guard Bands IP Registers

Each register is either read-only (RO) or read-write (RW).
Table 166.  Guard Bands IP RegistersIn the software API the register names appear with a prefix of INTEL_VVP, INTEL_VVP_CORE or INTEL_VVP_GUARD_BANDS as appropriate and with an optional REG suffix
Address Register Access Description
Lite37 Full
Parameterization registers
0x0000 VID_PID RO RO

Read this register to retrieve the Guard Bands Intel FPGA IP product ID.

This register always returns 0x6AF7_0231.

0x0004 VERSION RO RO

Read this register to retrieve the version information for the Intel Quartus Prime release that Intel uses to build the Configurable Guard Bands IP.

0x0008 LITE_MODE RO RO

Read this register to determine if Lite mode is on or off.

This register returns 0 when you turn off Lite mode and 1 for when you turn on Lite mode.

0x000C DEBUG_ENABLED RO RO

Read this register to determine if Debug features is on or off.

0x0010 NUM_GB_VALUES RO RO Read this register to determine the number of guard bands that you can set. Equivalent to number of color planes or (number of color planes + 1) if you turn on 4:2:2 support.
0x0014 to 0x011F - - - Unused.

Control and debug registers

For more information, refer to Control Packets

0x0120 IMG_INFO_WIDTH RW RO When you turn on Lite, the expected width of the incoming video fields. When you turn off Lite, the received width in image information packets.
0x0124 IMG_INFO_HEIGHT RW RO When you turn on Lite, the expected height of the incoming video fields. When you turn off Lite, the received height in image information packets.
0x0128 IMG_INFO_INTERLACE RW RO When you turn on Lite, the expected interlace information of the incoming video fields. When you turn off Lite, the received interlace information in image information packets.
0x012C Reserved RW RO Unused.
0x0130 IMG_INFO_COLORSPACE RW RO When you turn on Lite, the expected color space of the incoming video fields. When you turn off Lite, the received color space in image information packets.
0x0134 IMG_INFO_SUBSAMPLING RW RO When you turn on Lite, the expected chroma sub-sampling of the incoming video fields. When you turn off Lite, the received chroma sub-sampling in image information packets.
0x0138 IMG_INFO_COSITING RW RO When you turn on Lite, the expected chroma co-siting of the incoming video fields. When you turn off Lite, the received chroma co-siting in image information packets.
0x013C IMG_INFO_FIELD_COUNT RO RO The received field count field in image information packets.
0x0140 STATUS RO RO

Bit 0: Status bit.

1 means the IP is processing a video field, 0 otherwise.

When you turn off Lite:

Bit 1: Pending register updates bit.

Any writes to the specification registers (0x0148 - 0x0154) cause the IP to raise the pending register updates bit, to indicate outstanding changes to the guard band settings.

The IP lowers this bit at the start of the first packet for a new frame (first packet after the EOP) after a write to the COMMIT register.

0x0144 COMMIT RW RW

The IP uses this register with the STATUS register Pending register updates bit.

Write any value to this register after writing new values to any of the specification registers (0x0148 - 0x0154). The configurable guard bands change to the new guard band specification values at the start of the next video frame after the IP writes to this register.

The COMMIT register ensures atomic register updates, avoiding the IP only applying some of the updated register values for the next incoming frame.

Specification registers
0x0148 GB_0_VALUES RW RW

Write to this register to set the lower and upper guard band values for color plane 0.

0x014C GB_1_VALUES RW RW

Write to this register to set the lower and upper guard band values for color plane 1. Unused if NUM_GB_VALUES < 2.

0x0150 GB_2_VALUES RW RW

Write to this register to set the lower and upper guard band values for color plane 2.

Unused if NUM_GB_VALUES < 3.

0x0154 GB_3_VALUES RW RW

Write to this register to set the lower and upper guard band values for color plane 3.

Unused if NUM_GB_VALUES < 4.

Register Bit Descriptions

Table 167.  VID_PID
Name Bits Description
Guard Bands Intel FPGA IP vendor ID and product ID 31:0 This register always returns 0x6AF7_0231.
  • 15:0 is the product ID and always returns 0x0231
  • 31:16 is the vendor ID and always returns 0x6AF7
Table 168.  VERSION
Name Bits Description
Register map version 7:0 Register map version. Returns 0x01.
QPDS patch revision 15:8 Returns 0x00
QPDS update revision 23:16 Updated for each release. For 21.4, returns 0x04
QPDS major revision 31:24 Updated for each release. For 21.4, returns 0x15.
Table 169.  LITE_MODE
Name Bits Description
Lite mode parameterization bit 0 Returns 1 if you turn on lite mode.
Unused 31:1 Unused.
Table 170.  DEBUG_ENABLED
Name Bits Description
Debug features parameterization bit 0 Returns 1 if you turn on debug features.
Unused 31:1 Unused.
Table 171.  NUM_GB_VALUES
Name Bits Description
Number of GB values used 3:0 This field indicates number of guard bands that are active. Equivalent to number of color planes or (number of color planes + 1) if you turn on 4:2:2 support.
Unused 31:4 Unused.
Table 172.  IMG_INFO_WIDTH
Name Bits Description
Width bits 15:0

When you turn on Lite, write to this register to set the expected width of the incoming video fields.

When you turn off Lite and turn on Debug features, this register returns the width field from the most recently received.

Unused 31:16 Unused.
Table 173.  IMG_INFO_HEIGHT
Name Bits Description
Height bits 15:0

When you turn on Lite, write to this register to set the expected height of the incoming video fields.

When you turn off Lite and turn on Debug features, this register returns the height field from the most recently received.

Unused 31:16 Unused.
Table 174.  IMG_INFO_INTERLACE
Name Bits Description
interlaced bits 3:0

When you turn on Lite, write to this register to set the expected interlacing of the incoming video fields.

When you turn off Lite and turn on Debug features, this register returns the intlaceNibble field from the most recently received image information packet .

Unused 31:4 Unused.
Table 175.  IMG_INFO_COLORSPACE
Name Bits Description
Color space code bits 6:0

When you turn on Lite, write to this register to set the expected color space of the incoming video fields.

When you turn off Lite and turn on Debug features, this register returns the CSP field from the most recently received image information packet .

Unused 31:7 Unused.
Table 176.  IMG_INFO_SUBSAMPLING
Name Bits Description
Subsampling code bits 1:0

When you turn on Lite, write to this register to set the expected chroma sub-sampling of the incoming video fields.

When you turn off Lite and turn on Debug features, this register returns the SUBSA field from the most recently received image information packet.

Unused 31:2 Unused.
Table 177.  IMG_INFO_COSITING
Name Bits Description
Cosite code bits 1:0

When you turn on Lite, write to this register to set the expected chroma co-siting of the incoming video fields.

When you turn off Lite and turn on Debug features, this register returns the COSITE field from the most recently received image information packet.

Unused 31:2 Unused.
Table 178.  STATUS
Name Bits Description
Status bit 0 1 means configurable guard bands are processing a video field, 0 otherwise.
Pending register updates bit 1 1 means configurable guard bands have pending updates, 0 otherwise.
Table 179.  COMMIT
Name Bits Description
Commit bits 31:0 Write to any bits to trigger a commit.
Table 180.  GB_0_VALUES
Name Bits Description
GB_0_LOWER_VALUE 15:0 Write to this register to set the lower guard band value for color plane 0.
GB_0_UPPER_VALUE 31:16 Write to this register to set the upper guard band value for color plane 0.
Table 181.  GB_1_VALUES
Name Bits Description
GB_1_LOWER_VALUE 15:0 Write to this register to set the lower guard band value for color plane 1. Unused if NUM_GB_VALUES < 2.
GB_1_UPPER_VALUE 31:16 Write to this register to set the upper guard band value for color plane 1. Unused if NUM_GB_VALUES < 2.
Table 182.   GB_2_VALUES
Name Bits Description
GB_2_LOWER_VALUE 15:0 Write to this register to set the lower guard band value for color plane 2. Unused if NUM_GB_VALUES < 3.
GB_2_UPPER_VALUE 31:16 Write to this register to set the upper guard band value for color plane 2. Unused if NUM_GB_VALUES < 3.
Table 183.  GB_3_VALUES
Name Bits Description
GB_3_LOWER_VALUE 15:0 Write to this register to set the lower guard band value for color plane 3. Unused if NUM_GB_VALUES < 4.
GB_3_UPPER_VALUE 31:16 Write to this register to set the upper guard band value for color plane 3. Unused if NUM_GB_VALUES < 4.
37

When you turn on lite mode, registers are RW only if you turn on Debug features, otherwise they are WO. For full, turn off lite mode.