F-Tile Avalon® Streaming Intel® FPGA IP for PCI Express* User Guide

ID 683140
Date 5/15/2024
Document Table of Contents

3.11. PHY Reconfiguration Interface

The PHY reconfiguration interface is an optional Avalon-MM slave interface with a 25-bit address and an 8-bit data bus. Use this bus to read the value of PHY registers.