F-Tile Avalon® Streaming Intel® FPGA IP for PCI Express* User Guide

ID 683140
Date 10/22/2021
Public

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3.3.2.1. RX Flow Control

The RX flow control interface provides information on the application's available RX buffer space to the PCIe Hard IP in a time-division multiplexing (TDM) manner. It reports the space available in number of TLPs. Whenever TLP is read or extracted from the application RX buffer, rx_buffer_limit_i signal should increase accordingly. This information is consumed by the PCIe Hard IP to determine if application RX buffer is full and stop the received TLP to the application RX buffer.

The RX flow control interface is optional and disabled by default in the IP GUI. If disabled, it indicates that there is no limit in the application RX buffer space.

Flow control credits are available for the following TLP categories:
  • Posted (P) transactions: TLPs that do not require a response.
  • Non-posted (NP) transactions: TLPs that require a completion.
  • Completions (CPL): TLPs that respond to non-posted transactions.
Figure 18. RX Flow Control TDM reporting of credit limits
Figure 19. Buffer Limits Update example
Table 12.  Categorization of Transaction Types
TLP Type Category
Memory Write Posted
Memory Read Non-posted
Memory Read Lock Non-posted
I/O Read Non-posted
I/O Write Non-posted
Configuration Read Non-posted
Configuration Write Non-posted
Message Posted
Completion Completion
Completion with Data Completion
Completion Lock Completion
Completion Lock with Data Completion
Fetch and Add AtomicOp Non-posted
Table 13.  Credit Advertised by F-Tile PCIe Hard IP
RX Buffer Segment x16 Core (Port0) x8 Core (Port1) x4 Core (Port2/3)
Scaled Flow Control disabled (Credit) Scaled Flow Control enabled (Scale Factor , Credit) Scaled Flow Control disabled (Credit) Scaled Flow Control enabled (Scale Factor , Credit) Scaled Flow Control disabled (Credit) Scaled Flow Control enabled (Scale Factor , Credit)
Posted Headers 127 3 , 49 127 2 , 98 127 2 , 56
Posted Data 1456 1 , 1456 760 1 , 760 444 1 , 444
Non-posted Headers 127 3 , 49 127 2 , 98 127 2 , 56
Non-posted Data 392 1 , 392 196 1 , 196 112 1, 112

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