AN 787: Intel® Stratix® 10 Thermal Modeling and Management with the Early Power Estimator

ID 683083
Date 7/16/2021

1.4. Intel® Stratix® 10 FPGA Package Physical Design

An Intel® Stratix® 10 FPGA complex is contained in a BGA package with a copper IHS and it can contain up to three types of dies:
  • Core Fabric Die or the main FPGA die: This is the die that contains the basic logic resources and it is provided in different sizes and grades. Each package can only have a single core fabric die.
  • Transceiver Die: Transceiver dies are offered in three types: L-Tile, H-Tile and E-Tile. Packages with E-Tile are always equipped with one H-Tile. Each transceiver tile type supports certain protocols and transceiver speeds. Depending on the package size, an Intel® Stratix® 10 device can support between one and six transceiver dies and each die has 24 transceiver channels.
  • HBM Die: This die is provided in two configurations, 4 high or 8 high, which refers to the number of memory die stacks in each HBM. Not all Intel® Stratix® 10 packages have HBM, and the ones that do, can have either one or two HBMs.

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