1.13.2. CFD Analysis Results
The CFD analysis provides the Intel® Stratix® 10 case and die temperatures.
The Intel® Stratix® 10 case temperature profile shown below indicates a maximum temperature of 83.6 °C (TCASE) which is less than the 84 °C required by the EPE. This means that the maximum junction temperature will also be less than the design limit of 95 °C.
The Intel® Stratix® 10 die temperature profile shown below is only valid for the core fabric die temperature and not the transceiver die temperatures.
Calculate the transceiver die temperatures manually as follows.
- Determine the maximum core fabric temperature calculated by CFD (90.26 °C from the "Die Temperature Profile from CFD Analysis" figure above). This value is the core die operating temperature or FPGA Core Junction Temperature.
- Using the "EPE Thermal Worksheet Solution Table" and FPGA Core Junction Temperature (90.26 °C), linearly interpolate Overall Total Power (TTDP) and ΨJC.
ΨJC (°C/W) FPGA Core Junction Temperature (°C) TTDP (W) FPGA Core HSSI_0_0 HSSI_2_0 HSSI_0_1 HSSI_2_1 90.26 148 0.052 0.046 0.069 0.045 0.032
- Calculate the junction temperature (TJ) using the following equation:
TJ = TCASE + TTDP * ΨJC , where
- TCASE = maximum case temperature of 83.6 °C from the "Case Temperature Profile from CFD Analysis" figure above
- TTDP = 148 W from the table above
- ΨJC = for TJ_max, use the highest ΨJC value of any die which is 0.069 °C/W for the HSSI_2_0 transceiver die from the table above
Result: TJ_max = 83.6 °C + (148 W * 0.069 °C/W) = 93.82 °C
Notice that the calculated HSSI_2_0 junction temperature (TJ_max) is almost 7 °C higher than temperature calculated by CFD for this die. This is because CFD uses uniform power dissipation for the transceiver dies and, therefore, cannot calculate the local hot spots.
Other junction temperatures can be calculated in the same way.
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