Intel® Advisor User Guide

ID 766448
Date 3/31/2023

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Document Table of Contents


Set the cache line size (in bytes) for modeling CPU cache behavior during Memory Access Patterns analysis.

GUI Equivalent

Project Properties > Analysis Target > Memory Access Patterns > Advanced > Cache line size




<integer> is in bytes: 4 | 8 | 16 | 32 | 64 | 128 | 256 | 512 | 1024 | 2048 | 4096 | 8192 | 16384 | 32768 | 65536



Actions Modified

collect=map --enable cache-simulation



Cache simulation modeling applies to the following:

  • Memory Access Patterns analysis - This basic simulation functionality models accurate memory footprints, miss information, and cache line utilization for a downstream Memory Access Patterns report.

  • CPU / Memory Roofline Insights perspective - This enhanced simulation functionality models multiple levels of cache for a downstream Memory-Level Roofline chart or Roofline interactive HTML report.

This option is applicable only to Memory Access Patterns analysis.


Run a Memory Access Patterns analysis. Model four-way associative cache with 64-byte cache line size and default cache set size.

advisor --collect=map --enable-cache-simulation --cachesim-cacheline-size=64 --cachesim-associativity=4 --cachesim-mode=utilization --project-dir=./advi_results -- ./myApplication

See Also