AN 978: Nios® V Processor Migration Guidelines

ID 773196
Date 5/15/2024
Document Table of Contents

5.3. Interrupt

Nios® V processor implements 16 hardware interrupt inputs and internal timer or software interrupts.
Table 26.  Interrupt Feature Comparison
Feature Nios® V Processor Nios® II Processor
Hardware interrupts 16 interrupts 32 interrupts
Software interrupt Supported Not supported
Timer interrupt Supported Not supported
External Interrupt Controller Not supported Supported
Legacy HAL Interrupt API Not supported Supported
Enhanced HAL Interrupt API Supported Supported
  • The HAL driver for hardware interrupt is compatible, but take note that the Nios® V processor accepts interrupts number up to 16 only which reflects the difference in interrupt bus width.
  • Altera provides the HAL API for software interrupt and timer interrupt for the Nios® V processor.

If you have custom device drivers, Altera recommends that you upgrade them to use the enhanced HAL interrupt API. The enhanced API maintains compatibility with the IIC. The legacy HAL interrupt API is deprecated. Upgrading your device driver is very simple, requiring only minor changes to some function calls.

Table 27.  HAL Interrupt Legacy and Enhanced API Functions
Legacy API Function Enhanced API Function
alt_irq_register() alt_ic_isr_register()
alt_irq_disable() alt_ic_irq_disable()
alt_irq_enable() alt_ic_irq_enable()