AN 978: Nios® V Processor Migration Guidelines

ID 773196
Date 5/15/2024
Document Table of Contents BSP Project Generation

Generated BSP for Nios® II and Nios® V processors are not compatible. You are required to generate a new BSP project for Nios® V processor using the BSP Editor, after applying the same Nios® II processor BSP Settings. Refer to the settings in Intel® HAL BSP Settings and Micrium MicroC/OS-II BSP Settings.

Nios® V processor supports software-programmable exception address. Thus, exception vector configuration for Nios® V processor is relocated into the BSP Editor. In Nios® II processor, the exception vector configuration is found in the IP Parameter Editor.

The default exception region (agent) depends on the largest memory region connected to the Nios® V processor. You can select the .exceptions region using the drop-down list, which is populated from all connected memory regions.

Figure 29. Linker Section Mapping

For exception offset, you can configure the Offset (bytes) of the selected region. By default, the exception offset starts at 0. If the exception and reset agent are in the same memory region, the exception offset begins at 32 bytes after the reset offset.

Figure 30. Linker Memory Regions