Clock |
clock |
clock |
Similar clock input |
Reset |
reset |
reset |
Similar hard reset |
Debug reset |
-
dbg_reset_out
-
ndm_reset_in
|
debug_reset_request |
Mainly used to issue debug reset from CLI or IDE. By default, this feature is enabled in Nios® II/e processor but disabled in Nios® V/m processor. |
Interrupts |
platform_irq_rx |
irq |
Nios® II/e processor supports 32 platform interrupts. Nios® V/m processor supports 16 platform interrupts. |
Timer and Software Interrupt Module |
timer_sw_agent |
N/A |
Only supported in Nios® V processor. By default, it is connected to the data manager. |
Debug |
dm_agent |
debug_mem_slave |
Allow JTAG download and debug. For Nios® V/m processor, it is connected to the data manager and instruction manager by default. |
Data bus |
data_manager |
data_master |
- Nios® II/e processor uses Avalon® memory-mapped interface
- Nios® V/m processor uses Arm* AMBA* AXI-4 by default. You can switch to Avalon® memory-mapped interface.
|
Instruction bus |
instruction_manager |
instruction_master |
- Nios® II/e processor uses Avalon® memory-mapped interface
- Nios® V/m processor uses Arm* AMBA* AXI-4 by default. You can switch to Avalon® memory-mapped interface.
|
Custom instruction |
— |
custom_instruction_master |
Nios® V/m processor does not support custom instruction. |