AN 978: Nios® V Processor Migration Guidelines

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ID 773196
Date 5/22/2025
Public
Document Table of Contents
Document Table of Contents x
1. Overview 2. Architecture Comparison 3. Processor Core Upgrade Paths 4. Design Flow Comparison 5. Processor Core Comparison 6. Feature Comparison 7. Assembly Language Comparison 8. Document Revision History for the AN 978: Nios® V Processor Migration Guidelines
2. Architecture Comparison x
2.1. Features Comparison 2.2. Ecosystem Comparison 2.3. Software Optimization
4. Design Flow Comparison x
4.1. Differences in the Design Flow 4.2. Design Upgrade from Nios® II Processor to Nios® V Processor
4.2. Design Upgrade from Nios® II Processor to Nios® V Processor x
4.2.1. Quartus® Prime Standard Edition 4.2.2. Quartus® Prime Pro Edition
4.2.1. Quartus® Prime Standard Edition x
4.2.1.1. Hardware Component 4.2.1.2. Software Component
4.2.2. Quartus® Prime Pro Edition x
4.2.2.1. Hardware Component 4.2.2.2. Software Component
5. Processor Core Comparison x
5.1. Upgrading Nios® II/e Processor to Nios® V/c Processor 5.2. Upgrading Nios® II Processor to Nios® V/m Processor 5.3. Upgrading Nios® II/f Processor to Nios® V/g Processor
5.1. Upgrading Nios® II/e Processor to Nios® V/c Processor x
5.1.1. Hardware Perspective 5.1.2. Software Perspective
5.1.1. Hardware Perspective x
5.1.1.1. Signal and Interface Mapping 5.1.1.2. IP Parameter Configuration 5.1.1.3. BSP Project Generation
5.1.2. Software Perspective x
5.1.2.1. Command-Line Build Flow 5.1.2.2. IDE Build Flow
5.2. Upgrading Nios® II Processor to Nios® V/m Processor x
5.2.1. Hardware Perspective 5.2.2. Software Perspective
5.2.1. Hardware Perspective x
5.2.1.1. Signal and Interface Mapping 5.2.1.2. IP Parameter Configuration 5.2.1.3. BSP Project Generation
5.2.2. Software Perspective x
5.2.2.1. Command-Line Build Flow 5.2.2.2. IDE Build Flow
5.3. Upgrading Nios® II/f Processor to Nios® V/g Processor x
5.3.1. Hardware Perspective 5.3.2. Software Perspective
5.3.1. Hardware Perspective x
5.3.1.1. Signal and Interface Mapping 5.3.1.2. IP Parameter Configuration 5.3.1.3. BSP Project Generation
5.3.2. Software Perspective x
5.3.2.1. Command-Line Build Flow 5.3.2.2. IDE Build Flow
6. Feature Comparison x
6.1. Timer 6.2. Interrupt 6.3. Shadow Register 6.4. Ethernet Stack 6.5. Bootloader 6.6. Data and Instruction Cache 6.7. Tightly Coupled Memory 6.8. Custom Instructions 6.9. Error Correction Code 6.10. Altera HAL Settings 6.11. Micrium MicroC/OS-II BSP Settings 6.12. Software Packages
7. Assembly Language Comparison x
7.1. Arithmetic and Logic Operations 7.2. Data Handling and Memory Operations 7.3. Control Flow Operations 7.4. Miscellaneous Operations
1. Overview
2. Architecture Comparison
3. Processor Core Upgrade Paths
4. Design Flow Comparison
5. Processor Core Comparison
6. Feature Comparison
7. Assembly Language Comparison
8. Document Revision History for the AN 978: Nios® V Processor Migration Guidelines

6. Document Revision History for AN 978: Nios® V Processor Migration Guidelines

Document Version Changes
2024.05.15
  • Added notes in Software Component to refer to Intel HAL Settings to migrate BSP settings.
  • Edited IP Parameter Configuration.
    • Updated the IP Parameter Editor figures.
    • Updated the IP Parameter Editor Comparison table.
  • Edited Interrupt, Data and Instruction Cache, and Tightly Coupled Memory topics.
2023.11.12
  • Removed Atomic Extn from the following tables:
    • Core Architecture Comparison to Nios II/e Processor.
    • Core Architecture Comparison to Nios II/f Processor.
  • Edited the topic Software Optimization
    • Updated the Program Size (KB) values for Nios® V processor.
    • Added a link to Nios® V Processor Software Developer Handbook - Reducing Code Footprint in Embedded Systems.
  • Updated the figure for the IP Parameter Editor for Nios® V/c, Nios® V/m, and Nios® V/g processors.
  • Replaced table Supported Nios V Processor Booting Use Cases with the table Supported Flash Memories with Respective Boot Options.
  • Update the TCM in the table TCM Use Cases for Nios® V/g processor.
  • Updated the figure Tightly-Coupled Memory in Nios V/g Processor and the note
2023.10.02
  • Updated the following topics for new Nios® V/c processor variant and new Nios® V/g features:
    • Software Optimization
    • Design Migration from Nios II Processor to Nios V Processor for Quartus® Prime Pro Edition and Quartus® Prime Standard Edition
    • Migrating Nios II Processor to Nios V/m Processor
    • Migrating Nios II/f Processor to Nios V/g Processor
    • Timer
  • Added the following new topics:
    • Migrating Nios II/e Processor to Nios V/c Processor
    • Tightly Coupled Memory
    • Error Correction Code
2023.08.22 Updated the Memory Management Unit (MMU) value for Nios® II/f Processor in Core Architecture Comparison Table.
2023.04.14 Initial release.
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