Ashling* RiscFree* Integrated Development Environment (IDE) for Altera® FPGAs User Guide

ID 730783
Date 4/11/2025
Public

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2.4. Using Ashling* RiscFree* IDE for Altera® FPGAs with Arm* Hard Processor System

This section provides guidance on debugging Arm* HPS core using the RiscFree* IDE debugging tool. This tutorial is based on the Altera FPGA example design from Ashling*.
Note: RiscFree* IDE supports Arm* HPS standalone debug.