F-Tile JESD204C Intel® FPGA IP Design Example User Guide

ID 691269
Date 10/02/2023
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Document Table of Contents
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2. F-Tile JESD204C Intel® FPGA IP Design Example Quick Start Guide

The F-Tile JESD204C Intel® FPGA IP design examples for Intel Agilex® 7 devices features a simulating testbench and a hardware design that supports compilation and hardware testing.

You can generate the F-Tile JESD204C design examples through the IP catalog in the Intel® Quartus® Prime Pro Edition software.

Figure 1. Development Stages for the Design Example