RapidIO Intel FPGA IP User Guide

ID 683884
Date 9/15/2021
Public
Document Table of Contents

3.3.1. I/O Logical Layer Interfaces

I/O logical layer Interfaces selects whether or not to add an Avalon® -MM master interface and whether or not to add an Avalon® -MM slave interface. You can specify one of the following options:
  • Avalon® -MM Master and Slave
  • Avalon® -MM Master (this option is not valid in Intel® Arria® 10 and Intel® Cyclone® 10 GX variations)
  • Avalon® -MM Slave (this option is not valid in Intel® Arria® 10 and Intel® Cyclone® 10 GX variations)
  • None