RapidIO Intel FPGA IP User Guide

ID 683884
Date 9/15/2021
Public
Document Table of Contents

8.2.2.2. Adding the Master I/O BFM

To add the Master I/O BFM to your system, perform the following steps:
  1. In the Component Library, in the search box, type Altera Avalon® MM Master BFM.
  2. Highlight Altera Avalon® MM Master BFM and click Add. The Avalon® -MM Master BFM component is added to the system, and the Avalon® -MM Master BFM parameter editor appears.
  3. Under Port Widths, leave the default values.
  4. Under Parameters, set the options.
    Table 130.  Set Parameter Options
    Option Value
    Number of Symbols 8
    Burstcount width 6
  5. Under Port Enables, turn on and turn off options to enable only the following options:
    • Use the read signal
    • Use the write signal
    • Use the address signal
    • Use the byteenable signal
    • Use the burstcount signal
    • Use the readdata signal
    • Use the readdatavalid signal
    • Use the writedata signal
    • Use the waitrequest signal
  6. Click Finish to add the second Avalon® MM Master BFM to your Platform Designer (Standard) system.
  7. Right-click on the default name of the new component, mm_master_bfm_0, and click Rename.
  8. Type the new name, master_bfm_io. The design example requires this name to run.