Multi Channel DMA Intel® FPGA IP for PCI Express* User Guide

ID 683821
Date 7/14/2023

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Document Table of Contents

4.2. Clocks

Table 35.  Multi Channel DMA IP for PCI Express Clock Signals
Signal Name I/O Type Description Clock Frequency
refclk Input

PCIe reference clock defined by the PCIe specification.

This input reference clock must be stable and free-running at device power-up for a successful device configuration.

100 MHz ± 300 ppm

coreclkout_hip Output

This is an output clock provided to user logic. Avalon-MM / Avalon-ST user interfaces are synchronous to this clock.

250 MHz
P-Tile and F-Tile and R-Tile
refclk0 Input

PCIe reference clock defined by the PCIe specification. These clocks must be free-running and driven by the single clock source.

For F-Tile, connect outrefclk_fgt_i (i = 0 to 7) from “F-Tile Reference and SystemPLL Clocks” IP to this port.

Drive refclk1 input port with the same clock for refclk0 input port if your design does not need a separate refclk.

100 MHz ± 300 ppm

refclk1 Input
coreclkout_hip Output


Note: Not available for P-Tile.
Note: Not available for R-Tile.
Note: In earlier versions, this signal was present. Manual upgrade is required.
app_clk Output Application clock

Gen3: 250 MHz

Gen4: 400 MHz (Intel Stratix 10 DX), 500 MHz ( Intel Agilex® 7)

app_slow_clk Output

Clock for sideband signals.

Note: Only available for R-Tile on Intel® Quartus® Prime 22.4 version and onwards.

Divide-by-2 or Divide-by-4 clock derived from coreclkout_hip. Use the Slow Clock Divider option in the Parameter Editor to choose between the divide by 2 or 4 versions of coreclkout_hip for this clock.

pcie_systempll_clk Input

System PLL clock from “F-tile Reference and SystemPLL Clocks” IP. Connect out_systempll_clk_0 from the "F-Tile Reference and System PLL Clocks" IP to this port.

For Mode of System PLL setting, select frequency that is two times of the selected PLD Clock Frequency. For example, if the selected PLD clock frequency is 500 MHz, use the "PCIE_FREQ_1000" setting.

Note: Only available for F-Tile.