Multi Channel DMA Intel® FPGA IP for PCI Express User Guide

ID 683821
Date 4/11/2023
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

8.3.2.3. Descriptor Memory Management

As a part of channel initialization, the driver allocates the memory for descriptors and associates to the channel. Driver uses dma_alloc_coherent API of Linux DMA framework to allocate non-swapable and physically contagious memory.

  • By default, currently 1 page is enabled. 1 page contains 128 descriptors. By using ethtool, netdev supports changing the queue size.
  • Each queue (H2D & D2H) of each channel gets its descriptor memory.
  • After allocation of this memory, the hardware is notified of it by a write of the starting address to the QCSR region.