2.1.2. Enabling your Design for the Ethernet Toolkit
   To enable the use of the Ethernet Toolkit for E-, H-, and L-Tile Ethernet IPs, you must turn on the Enable JTAG to Avalon Master Bridge parameter in the Ethernet IP parameter editor. 
   
 
  
    Figure 2. Example of E-Tile Hard IP for Ethernet  Intel® FPGA IP Parameter Editor
     
      
   
 
  
   To enable the use of the Ethernet Toolkit for F-Tile Ethernet IP, you must turn on the Enable Ethernet Debug Master Endpoint parameter in the Ethernet IP parameter editor. 
   
 
  
    Figure 3. Example of F-Tile Ethernet  Intel® FPGA Hard IP Parameter Editor
     
      
   
 
  
   To enable the use of the Ethernet Toolkit for the Ethernet Subsystem  Intel® FPGA IP, you must turn on the Enable JTAG to Avalon Master Bridge parameter in the Ethernet Subsystem  Intel® FPGA IP parameter editor. 
   
 
  
    Figure 4. Example of Ethernet Subsystem  Intel® FPGA IP Parameter Editor
     
      
   
 
  
   To enable the use of the Ethernet Toolkit for the GTS Ethernet Intel FPGA Hard IP, you must turn on the Enable debug end point for Ethernet toolkit parameter in the GTS Ethernet Intel FPGA Hard IP parameter editor. 
   
 
 
    Figure 5. Example of GTS Ethernet Intel FPGA Hard IP Parameter Editor