Intel® FPGA SDK for OpenCL™: Intel® Arria® 10 SoC Development Kit Reference Platform Porting Guide

ID 683788
Date 10/08/2019
Public
Document Table of Contents

1.1. Intel Arria 10 SoC Development Kit Reference Platform: Prerequisites

The Intel Arria 10 SoC Development Kit Reference Platform Porting Guide assumes that you are an experienced FPGA designer who is familiar with Intel® 's FPGA design tools and concepts.

Prerequisites for the a10soc Reference Platform:

  • An Intel Arria 10 SoC-based accelerator card with working memory interfaces

    Test these interfaces together in the same design using the same version of the Intel® Quartus® Prime Pro Edition software that you will use to develop your Custom Platform.

  • Intel® Quartus® Prime Pro Edition software Version 19.3
  • Designing with Logic Lock Plus regions
  • Intel® SoC Embedded Design Suite Version 19.3

General knowledge prerequisites:

  • FPGA architecture, including clocking, global routing, and I/Os
  • High-speed design
  • Timing analysis
  • Platform Designer design, and Avalon® and AXI interfaces
  • Tcl scripting
  • Hard processor systems (HPS)
  • DDR4 external memory
  • Embedded Linux development

This document also assumes that you are familiar with the following Intel® FPGA SDK for OpenCL™ -specific tools and documentation:

  • Custom Platform Toolkit and the Intel® FPGA SDK for OpenCL™ Custom Platform Toolkit User Guide
  • Intel® FPGA SDK for OpenCL™ Intel® Arria® 10 GX FPGA Development Kit Reference Platform Porting Guide
  • Intel® FPGA SDK for OpenCL™ Cyclone V SoC Development Kit Reference Platform Porting Guide

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