Intel® Agilex™ F-Series and I-Series General-Purpose I/O User Guide

ID 683780
Date 9/29/2022
Public
Document Table of Contents

3.2. HPS I/O Features

The I/O bank within the HPS interface supports single-ended IO standards.

Power Pins for the HPS I/O Buffers

The VCCIO_HPS pin powers the I/O buffers located in the HPS I/O bank within the HPS I/O interface.

HPS I/O Buffer Features

The HPS I/O buffer supports these features:

  • Programmable current strength
  • Programmable weak pull-up and pull-down resistor
  • Programmable open-drain output
  • Programmable slew rate
  • Schmitt Trigger input buffer

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