Arria V Avalon-ST Interface for PCIe Solutions User Guide

ID 683733
Date 6/03/2020
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

9.1.5. Slot Power Limit Message

The PCI Express Base Specification Revision states that this message is not mandatory after link training.

Table 73.  Slot Power Message

Message

Root Port

Endpoint

Generated by

Comments

App Layer

Core

Core (with App Layer input)

Set Slot Power Limit

Transmit

Receive

No

Yes

No

In Root Port mode, through software.