Nios® V Processor Reference Manual

ID 683632
Date 10/02/2023

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Document Table of Contents Tightly Coupled Memory

Tightly coupled memory (TCM) guarantees fixed low-latency memory access for performance-critical applications. The advantages of TCM over cache memory are as follows:

  • Performance similar to cache memory
  • Software can guarantee that performance-critical code or data is located in TCM
  • No real-time caching overhead, such as loading, invalidating, or flushing memory

Physically, a TCM is a dedicated on-chip memory within the Nios® V processor core. Intel implements TCM using the M20K memory blocks. The Nios® V processor architecture supports four TCMs for instruction access and data access (two per access type). Each TCM provide an AXI4-Lite interface for connection with an external master, or manager. The interconnect would allow you to connect Avalon® or other supported manager. The external manager gains access to read or write the respective TCMs when the processor is in Wait-for-interrupt (WFI) state.