Visible to Intel only — GUID: prb1675066839867
Ixiasoft
Visible to Intel only — GUID: prb1675066839867
Ixiasoft
4.3.10.1.2. Data Manager Port
The Nios® V/g processor data bus is implemented as a 32-bit AMBA* 4 AXI manager port. The data manager port performs two functions:
- Read data from memory or a peripheral when the processor executes a load instruction.
- Write data to memory or a peripheral when the processor executes a store instruction.
axsize signal value indicates the load/store instruction size- byte (LB/SB), halfword (LH/SH) or word (LW/SW). Address on axaddr signal is always aligned to size of the transfer. For store instructions, respective writes strobe bits are asserted to indicate bytes being written.
Nios® V/g processor core does not support speculative issue of load/store instruction. Hence, a core can issue only one load or store instruction and waits until the issued instruction is complete.
Interface | Signal | Role | Width | Direction |
---|---|---|---|---|
Write Address Channel | awaddr | Store address | [31:0] | Output |
awprot | Unused | [2:0] | Output | |
awsize | Store size: SB, SH, SW | [2:0] | Output | |
awready | Store address ready (from memory) | 1 | Input | |
awvalid | Store address valid | 1 | Output | |
awlen | Write burst length
|
[7:0] | Output | |
Write Data Channel | wvalid | Store data valid | 1 | Output |
wdata | Store data | [31:0] | Output | |
wstrb | Byte position in word | [3:0] | Output | |
wlast | Last transfer in write burst | 1 | Output | |
wready | Store data ready (from memory) | 1 | Input | |
Write Response Channel | bvalid | Store response valid | 1 | Input |
bresp | Store response: Non-zero value denotes store access fault exception. | [1:0] | Input | |
bready | Constant 1 | 1 | Output | |
Read Address Channel | araddr | Load address | [31:0] | Output |
arprot | Unused | [2:0] | Output | |
arvalid | Load address valid | 1 | Output | |
arsize | Load size: SB, SH, SW | [2:0] | Output | |
arready | Load address ready (from subordinates) | 1 | Input | |
awlen | Read burst length
|
[7:0] | Output | |
Read Data Channel | rdata | Load data | [31:0] | Input |
rvalid | Load data valid | 1 | Input | |
rresp | Load response: Non-zero value denotes instruction access fault exception | [1:0] | Input | |
rready | Constant 1 | 1 | Output | |
rlast | Last transfer in a read burst | 1 | Input |