Nios® V Processor Reference Manual

ID 683632
Date 10/02/2023
Public

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2.3. Processor Architecture

The Nios® V/c processor architecture describes an instruction-set architecture (ISA). The ISA in turn necessitates a set of functional units that implement the instructions.
The Nios® V processor architecture defines the following functional units:
  • General-purpose register file
  • Arithmetic logic unit (ALU)
  • Instruction bus
  • Data bus
  • ECC module
Figure 2.  Nios® V/c Processor Core Block Diagram