Intel® Arria® 10 Native Fixed Point DSP IP Core User Guide

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ID 683583
Date 3/13/2017
Public

3.2.2. Pre-adder

The pre-adder can be configured in the following configurations:
  • Two independent 18-bit (signed/unsigned) pre-adders.
  • One 26-bit pre-adder.

When you enable pre-adder in 18 × 18 multiplication modes, ay and az are used as the input bus to the top pre-adder while by and bz are used as the input bus to the bottom pre-adder. When you enable pre-adder in 27 × 27 multiplication mode, ay and az are used as the input bus to the pre-adder.

The pre-adder supports both addition and subtraction operations. When both pre-adders within the same DSP block are used, they must share the same operation type (either addition or subtraction).

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