Intel® Arria® 10 Native Fixed Point DSP IP Core User Guide

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ID 683583
Date 3/13/2017
Public

2.1.2. Pre-adder Tab

Table 2.  Pre-adder Tab
Parameter IP Generated Parameter Value Description
‘ay' operand source operand_source_may input preadder Specify the operand source for ay input. Select preadder to enable pre-adder module for top multiplier. Settings for ay and by operand source must be the same.
‘by' operand source operand_source_mby input preadder Specify the operand source for by input. Select preadder to enable pre-adder module for bottom multiplier. Settings for ay and by operand source must be the same.
Set pre-adder a operation to subtraction preadder_subtract_a

No

Yes

Select Yes to specify subtraction operation for pre-adder module for the top multiplier. Pre-adder settings for top and bottom multiplier must be the same.
Set pre-adder b operation to subtraction preadder_subtract_b

No

Yes

Select Yes to specify subtraction operation for pre-adder module for the bottom multiplier. Pre-adder settings for top and bottom multiplier must be the same.
Data 'z' Configuration
'az' input bus width az_width 1–26 Specify the width of az input bus.0
Register input 'az' of the multiplier az_clock

No

Clock0

Clock1

Clock2

Select Clock0 , Clock1 or Clock2 to enable and specify the input clock signal for az input registers. Clock settings for ay, az and bz input registers must be the same.
'bz' input bus width bz_width 1–18 Specify the width of az input bus.0
Register input 'bz' of the multiplier bz_clock

No

Clock0

Clock1

Clock2

Select Clock0 , Clock1 or Clock2 to enable and specify the input clock signal for bz input registers. Clock settings for ay, az and bz input registers must be the same.

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