Intel® Arria® 10 Native Fixed Point DSP IP Core User Guide

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ID 683583
Date 3/13/2017
Public
Document Table of Contents
Document Table of Contents x
1. Intel® Arria® Native Fixed Point DSP IP Core User Guide 2. Getting Started 3. Functional Description A. Arria 10 Native Fixed Point DSP IP Core User Guide Document Archives B. Additional Information
1. Intel® Arria® Native Fixed Point DSP IP Core User Guide x
1.1. Arria 10 Native Fixed Point DSP IP Core Features
2. Getting Started x
2.1. Arria 10 Native Fixed Point DSP IP Core Parameter Settings
2.1. Arria 10 Native Fixed Point DSP IP Core Parameter Settings x
2.1.1. Operation Mode Tab 2.1.2. Pre-adder Tab 2.1.3. Internal Coefficient Tab 2.1.4. Accumulator/Output Cascade Tab 2.1.5. Pipelining Tab 2.1.6. Maximum Input Data Width Per Operation Mode
3. Functional Description x
3.1. Operational Modes 3.2. Optional Modules 3.3. Clocking Scheme 3.4. Arria 10 Native Fixed Point DSP IP Core Signals
3.1. Operational Modes x
3.1.1. The 18 × 18 Full Mode 3.1.2. The 18 × 18 Sum of 2 Mode 3.1.3. The 18 × 18 Plus 36 Mode 3.1.4. The 18 × 18 Systolic Mode 3.1.5. The 27 × 27 Mode
3.1.3. The 18 × 18 Plus 36 Mode x
3.1.3.1. Using Less Than 36-bit Operand In 18 × 18 Plus 36 Mode
3.2. Optional Modules x
3.2.1. Input Cascade 3.2.2. Pre-adder 3.2.3. Internal Coefficient 3.2.4. Accumulator and Output Cascade 3.2.5. Pipeline Register
B. Additional Information x
B.1. Arria 10 Native Fixed Point DSP IP Core Document Revision History
1. Intel® Arria® Native Fixed Point DSP IP Core User Guide
2. Getting Started
3. Functional Description
A. Arria 10 Native Fixed Point DSP IP Core User Guide Document Archives
B. Additional Information

2.1.4. Accumulator/Output Cascade Tab

Table 4.  Accumulator/Output Cascade Tab
Parameter IP Generated Parameter Value Description
Enable 'accumulate' port enable_accumulate No

Yes

Select Yes to enable accumulator port.
Enable 'negate' port enable_negate No

Yes

Select Yes to enable negate port.
Enable 'loadconst' port enable_loadconst No

Yes

Select Yes to enable loadconst port.
Register input 'accumulate' of the accumulator accumulate_clock No

Clock0

Clock1

Clock2

Select Clock0 , Clock1 or Clock2 to enable and specify the input clock signal for the accumulate input registers.
Register input 'loadconst' of the accumulator load_const_clock No

Clock0

Clock1

Clock2

Select Clock0 , Clock1 or Clock2 to enable and specify the input clock signal for the loadconst input registers.
Register input 'negate' of the adder unit negate_clock No

Clock0

Clock1

Clock2

Select Clock0 , Clock1 or Clock2 to enable and specify the input clock signal for the negate input registers.
Enable double accumulator enable_double_accum No

Yes

Select Yes to enable double accumulator feature.
N value of preset constant load_const_value Integer Specify the preset constant value.

This value can be 2N where N is the preset constant value.

Enable chainin port use_chainadder No

Yes

Select Yes to enable output cascade module and the chainin input bus.

Output cascade feature is not supported in m18×18_full operation mode.

Enable chainout port chainout_enable No

Yes

Select Yes to enable the chainout output bus.

Output cascade feature is not supported in m18×18_full operation mode.

Level Two Title