2. Getting Started
This chapter provides a general overview of the Intel® FPGA IP core design flow to help you quickly get started with the Arria 10 Native Fixed Point DSP IP core. The Intel® FPGA IP Library is installed as part of the Quartus® Prime installation process. You can select and parameterize any Intel® IP core from the library. Intel® provides an integrated parameter editor that allows you to customize the DSP IP core to support a wide variety of applications. The parameter editor guides you through the setting of parameter values and selection of optional ports.
Did you find the information on this page useful?