1.1. Acronyms and Definitions
1.2. Recommended System Requirements
1.3. Installation Folders
1.4. Boot Flow Overview
1.5. Getting Started
1.6. Enabling the UEFI DXE Phase and the UEFI Shell
1.7. Using the Network Feature Under the UEFI Shell
1.8. Creating your First UEFI Application
1.9. Using Arm* DS-5* Intel® SoC FPGA Edition (For Windows* Only)
1.10. Pit Stop Utility Guide
1.11. Porting HWLIBs to UEFI Guidelines
1.12. Tera Term Installation
1.13. Minicom Installation
1.14. Win32DiskImager Tool Installation
1.15. TFTPd64 By Ph.Jounin Installation
1.16. Revision History of Intel® Arria® 10 SoC UEFI Boot Loader User Guide
1.5.1. Compiling the Hardware Design
1.5.2. Generating the Boot Loader and Device Tree for UEFI Boot Loader
1.5.3. Building the UEFI Boot Loader
1.5.4. Creating an SD Card Image
1.5.5. Creating a QSPI Image
1.5.6. Booting the Board with SD/MMC
1.5.7. Booting the Board with QSPI
1.5.8. Early I/O Release
1.5.9. Booting Linux* Using the UEFI Boot Loader
1.5.10. Debugging an Example Project
1.5.11. UEFI Boot Loader Customization
1.5.12. Enabling Checksum for the FPGA Image
1.5.13. NAND Bad Block Management
1.5.7.1. Configuring the Board
Confirm that the memories are installed in the following way:
- A DDR4 memory card is installed on the HPS memory socket.
- A QSPI daughter card is installed on the boot flash socket.
Confirm that the board switches are configured as in the tables below:
Switch Type | Required Setting | Function |
---|---|---|
SW1 Settings | ||
SW1.1 – I2C flag | OFF | ON (0): System MAX5 is the I2C master. OFF (1): HPS is the I2C master. |
RevA.1 and RevA.2 Board | ||
SW1.2 – factory_load | ON | ON (0): Load the user design from flash at power up. OFF (1): Load the factory design from flash at power up. |
SW1.3 – msel1 | ON | ON (up): MSEL[1] is 0. OFF (down): MSEL[1] is 1. |
SW1.4 – msel0 | ON | ON (up): MSEL[0] is 0. OFF (down): MSEL[0] is 1. |
RevB.1 Board | ||
SW1.2 – dc_power_ctrl | ON | ON (0): Do not turn on FMC/PCIE power directly. OFF (1): Turn on FMC/PCIE power directly. |
SW1.3 – factory_load | ON | ON (0): Load the user design from flash at power up. OFF (1): Load the factory design from flash at power up. |
SW1.4 – security_mode | ON | Reserved |
SW2 Settings : ALL ON | ||
SW3 Settings | ||
SW3.1 – Arria10 | OFF | ON – Arria10 JTAG Bypass OFF – Arria10 JTAG Enable |
SW3.2 – IO MAXV | ON | ON – MAXV JTAG Bypass OFF – MAXV JTAG Enable |
SW3.3 – FMCA | ON | ON – FMCA JTAG Bypass OFF – FMCA JTAG Enable |
SW3.4 – FMCB | ON | ON – FMCB JTAG Bypass OFF – FMCB JTAG Enable |
SW3.5 – PCIE | ON | ON – PCIE JTAG Bypass OFF – PCIE JTAG Enable |
SW3.6 – MSTR0 | OFF | See "Master Switch Settings" Table |
SW3.7 – MSTR1 | OFF | |
SW3.8 – MSTR2 | OFF | |
SW4 Settings: ALL OFF (RevA.1 & RevA.2 Board) | ||
SW4 Settings: (RevB.1 Board) | ||
SW4.1 – reserve | OFF | - |
SW4.2 – MSEL0 | ON | ON=1 OFF=0 |
SW4.3 – MSEL1 | OFF | |
SW4.4 – MSEL2 | OFF |
MSTR[2] | MSTR[1] | MSTR[0] | Master Selected |
---|---|---|---|
ON | ON | ON | Boot |
OFF | ON | ON | FMCA (not implemented yet) |
ON | OFF | ON | FMCB (not implemented yet) |
ON | ON | OFF | FTRACE |
OFF | OFF | OFF | ON-BOARD UBII |
ON | OFF | OFF | MAXV A Programming Mode (only for advanced user) |
OFF | ON | OFF | GUI Mode |
Confirm that the following jumpers are configured as follows:
- Place jumpers on J16 and J17
- Leave all other jumpers unplaced