Stratix V Avalon-MM Interface for PCIe Solutions: User Guide

ID 683411
Date 5/21/2017
Document Table of Contents

2.5. Simulating the Single DWord Design

You can use the same testbench to simulate the Completer-Only Single Dword IP core by changing the settings in the driver file.

  1. In a terminal window, change to the <project_dir>/<variant>/testbench/<variant>_tb/simulation/submodules directory.
  2. Open altpcietb_bfm_driver_avmm.v in your text editor.
  3. To enable target memory tests and specify the completer-only single dword variant, specify the following parameters:
    1. parameter RUN_TGT_MEM_TST = 1;
    2. parameter RUN_DMA_MEM_TST = 0;
    3. parameter AVALON_MM_LITE = 1;
  4. Change to the <project_dir>/variant/testbench/mentor directory.
  5. Start the ModelSim simulator.
  6. To run the simulation, type the following commands in a terminal window:
    1. do msim_setup.tcl
    2. ld_debug (The debug suffix stops optimizations, improving visibility in the ModelSim waveforms.)
    3. run 140000 ns