Stratix V Avalon-MM Interface for PCIe Solutions: User Guide

ID 683411
Date 5/21/2017
Public
Document Table of Contents

1.9. Recommended Speed Grades

Table 7.   Stratix V Recommended Speed Grades for All Avalon-MM Widths and Frequencies

Lane Rate

Link Width

Interface Width

Application Clock Frequency (MHz)

Recommended Speed Grades

Gen1

×8

128 Bits

125

–1, –2, –3, –4

Gen2

×4

128 bits

125

–1, –2, –3, –4

×8

128 bits

250

–1, –2, –3

Gen3

×2

128 bits

125

–1, –2, –3 2

×4

128 bits

250

–1, –2, –3 2

×8

256 bits

250

–1, –2, –3 2

2 The -4 speed grade is also possible for this configuration; however, it requires significant effort by the end user to close timing.