Serial Lite IV Intel® Agilex™ FPGA IP Design Example User Guide

ID 683391
Date 11/01/2021

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3.7.1. Setting Up and Running the Toolkit

To run the toolkit, follow these steps:
  1. Generate the design example after you specify the parameters.
  2. Compile the design example to generate a .sof file.
  3. In the Intel® Quartus® Prime Pro Edition software, select Tools > System Debugging Tools > System Console to launch the system console.
  4. In the System Console, click Load Design and select the .sof file for the design example.
  5. Under the list of Instances, select sliv_ip_toolkit_1.3.
  6. Under the Details pane, select Serial Lite IV IP Toolkit and click Open Toolkit.
    Figure 19. Launch the Serial Lite IV IP Toolkit
When the toolkit is up and running, set JTAG master by following the instructions given in the display window.
Figure 20. Setting JTAG Master