Serial Lite IV Intel® Agilex™ FPGA IP Design Example User Guide

ID 683391
Date 11/01/2021

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2.3. Generating the Design

You can use the IP parameter editor in the Intel® Quartus® Prime Pro Edition software to generate the design example.
Figure 3. Generating the Design Flow

To generate the design example from the IP parameter editor:

  1. In the Tools > IP Catalog, locate and select Serial Lite IV Intel® FPGA IP . The IP parameter editor appears.
  2. Specify the parameters for your design.
  3. Click the Generate Example Design button.

The software generates all design files in the sub-directories. You need these files to run simulation, compilation, and hardware testing.