DisplayPort Intel® FPGA IP User Guide

ID 683273
Date 10/16/2023
Document Table of Contents


Address: 0x0101

Direction: RW

Reset: 0x00000000

Table 113.  DPTX_AUX_COMMAND Bits
Bit Bit Name Function
31:8 Unused
7:4 COMMAND AUX transaction command for the next request or received in the most recent reply (refer to the VESA DisplayPort Standard for details). Reading of this register clears MSG_READY and LENGTH in DPTX_AUX_CONTROL register.
3:0 BYTE Transaction address[19:16] for the next request.